使用标准多核CPU和FPGA芯片进行的模块化多电平换流器的实时和超实时仿真

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Real-Time and Faster-Than-Real-Time Simulation of Modular Multilevel Converters using standard multi-core CPU and FPGA Chips
) r7 `# k4 j) x( Q% m& ?6 Y使用标准多核CPU和FPGA芯片进行的模块化多电平换流器的实时和超实时仿真
Author(s)
WeiLi, Jean Bélanger, Can Wang,
) r5 q1 c7 K& }0 [Abstract
Modular Multilevel Converter (MMC) has many advantages for high-voltage direct current (HVDC) transmission and to integrate renewable energy to the main grid. Recently, there are several MMC projects being planning or in development over the world. However, due to the fact that the MMC has a large number of sub-modules (SMs) and a sophisticated controller, there are high demands on simulation tools to validate its design. A digital real-time simulator can simulate the MMC system quickly and accurately, and is able to validate the real MMC controller through hardware-in-the-loop tests. The challenges are to have an accurate and efficient MMC model so the simulator can solve the system with large number of MMC SMs in a very small time step, below 25 us. In this paper, two MMC models implemented in standard INTEL multi-core CPU and FPGA for a faster-than-real-time and real-time simulation platform are presented. The model performance and accuracy are studied through a back-to-back MMC HVDC system, and compared to a reference model made by SimPowerSystems blocks in MATLAB. It is demonstrated that the both models have high fidelity and an MMC system with as high as 3000 SMs can be simulated in real time with a time step of 500 nanoseconds using FPGA chips.
1 ]7 R. U5 }  ]; E- c( g+ J+ R4 {& }6 |模块化多电平换流器（MMC）在高压直流输电（HVDC）以及将可再生能源并入主电网方面有很多优势。世界上近来有数个MMC项目正在开发或规划。然而，MMC有大量的子模块以及精密复杂的控制器，这就对验证其设计的仿真器提出了极高的要求。数字实时仿真器可快速并准确地对MMC系统进行仿真，且通过HIL测试还能够验证真实的MMC控制器。挑战在于我们需要一个精确有效的MMC模型来让仿真器在极短的步长内（低于25us）解决有大量MMC子模块的系统。在这篇论文中介绍了分别在INTEL多核CPU和FPGA上运行两个MMC模型来进行实时和超实时仿真。模型性能和精确度通过一个背靠背MMC HVDC系统得到研究，并与Matlab中SimPowerSystem数据块生成的参考模型做了比较。结果说明了两个模型具有高保真性，以及使用FPGA芯片可实现对一个有3000个子模块的MMC系统的500纳秒步长级实时仿真。
' q' p' R: j% O/ a Modular Multilevel Converters using standard multi-core CPU and FPGA Chips.rar (1.03 MB, 下载次数: 1)

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