nautica 发表于 2010-4-28 10:31:03

关于PSCAD中PLL模型问题

小弟新学PSCAD,对于PLL模型的具体原理不是很清楚,哪位高手能详细说一下具体是怎么计算的,感激,...

wujiajia007 发表于 2010-4-28 14:53:36

Description
This component is a 3-phase, PI controlled phase locked loop, which generates a ramp signal theta that varies between 0 and 360°, synchronized or locked in phase, to the input voltage Va.


帮助:
The Phase Vector Technique is used to generate the ramp. This technique exploits trigonometric multiplication identities to form an error signal that speeds up and slows down the phase-locked oscillator, to match the phase of the input. The phase error is passed as an output variable after conversion to degrees. The frequency of the input is computed and returned as an internal output parameter called Name for Tracked Frequency.

nautica 发表于 2010-4-28 17:52:19

help原理我有看到,但是他的具体原理和计算方法没有介绍,能否说的详细点呢

stoon123 发表于 2010-4-29 15:55:33

原理方面查查书 文献就有了。。,

cuck 发表于 2010-4-30 09:59:38

Internal Phase Locked Oscillator
The Phase Locked Oscillator (PLO) is based on the Phase Vector technique.This technique exploits trigonometric multiplication identities to form an error signal, which speeds up or slows down the PLO in order to match the phase.The output signal q is a ramp synchronized to the Phase A commutating bus L-G voltage.



The block diagram of the PLO used in the 6-Pulse bridge component is shown below:












The output signal is then phase shifted by simply adding a constant angle to the ramp (to account for various Converter Transformer configurations) to generate the firing ramp for valve 1.The ramps for the other valves are generated by adding 60° increments to the valve 1 ramp.

cuck 发表于 2010-4-30 10:00:51

这个应该是PLL内部模块的原理。

ASLANWH 发表于 2010-5-3 14:03:55

看不了帖子的内容,先回个帖

菜鸟一枚 发表于 2012-4-24 21:18:14

同问啊

daben 发表于 2012-8-5 12:58:38

也想知道

daben 发表于 2012-8-5 13:43:23

这个比较复杂
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